Merge 37869dfe65 into 176d4a7783

Fix Japanese translation of "run in parallel"

blog/content/edition-2/posts/02-minimal-rust-kernel/index.fa.md

@@ -197,6 +197,12 @@ rtl = true
 
 For more information, see our post on [disabling SIMD](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.md).
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 #### کنار هم قرار دادن
 فایل مشخصات هدف ما اکنون به این شکل است:
 
@@ -214,7 +220,8 @@ For more information, see our post on [disabling SIMD](@/edition-2/posts/02-mini
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.fr.md

@@ -194,6 +194,12 @@ Un problème avec la désactivation de SIMD est que les opérations sur les nomb
 
 Pour plus d'informations, voir notre article sur la [désactivation de SIMD](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.md).
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 #### Assembler le tout
 Notre fichier de spécification de cible ressemble maintenant à ceci :
 
@@ -211,7 +217,8 @@ Notre fichier de spécification de cible ressemble maintenant à ceci :
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.ja.md

@@ -191,6 +191,13 @@ SIMDを無効化することによる問題に、`x86_64`における浮動小
 
 より詳しくは、[SIMDを無効化する](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.md)ことに関する私達の記事を読んでください。
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
+
 #### まとめると
 私達のターゲット仕様ファイルは今このようになっているはずです。
 
@@ -208,7 +215,8 @@ SIMDを無効化することによる問題に、`x86_64`における浮動小
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.ko.md

@@ -202,6 +202,12 @@ SIMD 레지스터 값들을 메모리에 백업하고 또 다시 복구하는
 
 더 자세히 알고 싶으시다면, 저희가 작성한 [SIMD 기능 해제](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.ko.md)에 관한 포스트를 확인해주세요.
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 #### 요약
 컴파일 대상 환경 설정 파일을 아래와 같이 작성합니다:
 
@@ -219,7 +225,8 @@ SIMD 레지스터 값들을 메모리에 백업하고 또 다시 복구하는
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.md

@@ -189,6 +189,12 @@ A problem with disabling SIMD is that floating point operations on `x86_64` requ
 
 For more information, see our post on [disabling SIMD](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.md).
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 #### Putting it Together
 Our target specification file now looks like this:
 
@@ -206,7 +212,8 @@ Our target specification file now looks like this:
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.ru.md

@@ -194,6 +194,12 @@ Cargo поддерживает различные целевые системы
 
 Для получения дополнительной информации см. наш пост об [отключении SIMD](@/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.ru.md).
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 #### Соединяем все вместе
 
 Наша спецификация целовой платформы выглядит следующим образом:
@@ -212,7 +218,8 @@ Cargo поддерживает различные целевые системы
   "linker": "rust-lld",
   "panic-strategy": "abort",
   "disable-redzone": true,
-  "features": "-mmx,-sse,+soft-float"
+  "features": "-mmx,-sse,+soft-float",
+  "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/02-minimal-rust-kernel/index.zh-CN.md

@@ -161,6 +161,12 @@ Nightly 版本的编译器允许我们在源码的开头插入**特性标签**
 
 [disabling SIMD]: @/edition-2/posts/02-minimal-rust-kernel/disable-simd/index.zh-CN.md
 
+```json
+"rustc-abi": "x86-softfloat"
+```
+
+As we want to use the `soft-float` feature, we also need to tell the Rust compiler `rustc` that we want to use the corresponding ABI. We can do that by setting the `x86-softfloat` field to `x86-softfloat`.
+
 现在，我们将各个配置项整合在一起。我们的目标配置清单应该长这样：
 
 ```json
@@ -177,7 +183,8 @@ Nightly 版本的编译器允许我们在源码的开头插入**特性标签**
     "linker": "rust-lld",
     "panic-strategy": "abort",
     "disable-redzone": true,
-    "features": "-mmx,-sse,+soft-float"
+    "features": "-mmx,-sse,+soft-float",
+    "rustc-abi": "x86-softfloat"
 }
 ```
 

blog/content/edition-2/posts/08-paging-introduction/index.md

@@ -118,7 +118,7 @@ The simple page tables we just saw have a problem in larger address spaces: they
 
 ![Page 0 mapped to frame 0 and pages `1_000_000`–`1_000_150` mapped to frames 100–250](single-level-page-table.svg)
 
-It only needs 4 physical frames, but the page table has over a million entries. We can't omit the empty entries because then the CPU would no longer be able to jump directly to the correct entry in the translation process (e.g., it is no longer guaranteed that the fourth page uses the fourth entry).
+It only needs 4 physical frames, but the page table has over twenty thousand entries. We can't omit the empty entries because then the CPU would no longer be able to jump directly to the correct entry in the translation process (e.g., it is no longer guaranteed that the fourth page uses the fourth entry).
 
 To reduce the wasted memory, we can use a **two-level page table**. The idea is that we use different page tables for different address regions. An additional table called _level 2_ page table contains the mapping between address regions and (level 1) page tables.
 
@@ -130,7 +130,7 @@ Page 0 falls into the first `10_000` byte region, so it uses the first entry of
 
 The pages `1_000_000`, `1_000_050`, and `1_000_100` all fall into the 100th `10_000` byte region, so they use the 100th entry of the level 2 page table. This entry points to a different level 1 page table T2, which maps the three pages to frames `100`, `150`, and `200`. Note that the page address in level 1 tables does not include the region offset. For example, the entry for page `1_000_050` is just `50`.
 
-We still have 100 empty entries in the level 2 table, but much fewer than the million empty entries before. The reason for these savings is that we don't need to create level 1 page tables for the unmapped memory regions between `10_000` and `1_000_000`.
+We still have 100 empty entries in the level 2 table, but much fewer than the twenty thousand empty entries before. The reason for these savings is that we don't need to create level 1 page tables for the unmapped memory regions between `10_000` and `1_000_000`.
 
 The principle of two-level page tables can be extended to three, four, or more levels. Then the page table register points to the highest level table, which points to the next lower level table, which points to the next lower level, and so on. The level 1 page table then points to the mapped frame. The principle in general is called a _multilevel_ or _hierarchical_ page table.
 

blog/content/edition-2/posts/12-async-await/index.ja.md

@@ -32,7 +32,7 @@ translation_contributors = ["asami-kawasaki", "Foo-x"]
 
 [**マルチタスク**]: https://en.wikipedia.org/wiki/Computer_multitasking
 
-一見、すべてのタスクが並行して実行されているように見えますが、1つのCPUコアで同時に実行できるのは1つのタスクだけです。タスクが並列に実行されているように見せるために、OSは実行中のタスクを素早く切り替えて、それぞれのタスクが少しずつ進むようにしています。コンピュータは高速なので、ほとんどの場合、私達がこの切り替えに気づくことはありません。
+一見、すべてのタスクが並列に実行されているように見えますが、1つのCPUコアで同時に実行できるのは1つのタスクだけです。タスクが並列に実行されているように見せるために、OSは実行中のタスクを素早く切り替えて、それぞれのタスクが少しずつ進むようにしています。コンピュータは高速なので、ほとんどの場合、私達がこの切り替えに気づくことはありません。
 
 シングルコアのCPUは一度に1つのタスクしか実行できませんが、マルチコアのCPUは複数のタスクを真の意味で並列に実行することができます。例えば、8コアのCPUであれば、8つのタスクを同時に実行することができます。マルチコアCPUの設定方法については、今後の記事でご紹介します。この記事では、わかりやすくするために、シングルコアのCPUに焦点を当てます。（なお、マルチコアCPUには、最初は1つのアクティブコアしかないので、ここではシングルコアCPUとして扱っても問題はありません）。