From 8b807a7d25f53a1e99ccc5f0c047d68864a688af Mon Sep 17 00:00:00 2001
From: Philipp Oppermann <dev@phil-opp.com>
Date: Wed, 25 Jan 2017 13:46:21 +0100
Subject: [PATCH] Update posts to latest bit_field version

---
 blog/post/09-catching-exceptions.md |  8 ++++----
 blog/post/12-double-faults.md       | 12 ++++++------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/blog/post/09-catching-exceptions.md b/blog/post/09-catching-exceptions.md
index 64dfa5fa..fbbc3a56 100644
--- a/blog/post/09-catching-exceptions.md
+++ b/blog/post/09-catching-exceptions.md
@@ -148,7 +148,7 @@ Well, none of these variants is really _readable_ and it's very easy to make mis
 [Range]: https://doc.rust-lang.org/nightly/core/ops/struct.Range.html
 
 ``` rust
-self.0.set_range(0..3, stack_index);
+self.0.set_bits(0..3, stack_index);
 ```
 
 I think it is much more readable, since we abstracted away all bit-masking details. The `BitField` trait is contained in the [bit_field] crate. (It's pretty new, so it might still contain bugs.) To add it as dependency, we run `cargo add bit_field` and add `extern crate bit_field;` to our `src/lib.rs`.
@@ -168,7 +168,7 @@ pub struct EntryOptions(u16);
 impl EntryOptions {
     fn minimal() -> Self {
         let mut options = 0;
-        options.set_range(9..12, 0b111); // 'must-be-one' bits
+        options.set_bits(9..12, 0b111); // 'must-be-one' bits
         EntryOptions(options)
     }
 
@@ -189,12 +189,12 @@ impl EntryOptions {
     }
 
     pub fn set_privilege_level(&mut self, dpl: u16) -> &mut Self {
-        self.0.set_range(13..15, dpl);
+        self.0.set_bits(13..15, dpl);
         self
     }
 
     pub fn set_stack_index(&mut self, index: u16) -> &mut Self {
-        self.0.set_range(0..3, index);
+        self.0.set_bits(0..3, index);
         self
     }
 }
diff --git a/blog/post/12-double-faults.md b/blog/post/12-double-faults.md
index d94ef0de..b6a55b06 100644
--- a/blog/post/12-double-faults.md
+++ b/blog/post/12-double-faults.md
@@ -635,15 +635,15 @@ impl Descriptor {
 
         let mut low = PRESENT.bits();
         // base
-        low.set_range(16..40, ptr.get_range(0..24));
-        low.set_range(56..64, ptr.get_range(24..32));
+        low.set_bits(16..40, ptr.get_bits(0..24));
+        low.set_bits(56..64, ptr.get_bits(24..32));
         // limit (the `-1` in needed since the bound is inclusive)
-        low.set_range(0..16, (size_of::<TaskStateSegment>() - 1) as u64);
+        low.set_bits(0..16, (size_of::<TaskStateSegment>() - 1) as u64);
         // type (0b1001 = available 64-bit tss)
-        low.set_range(40..44, 0b1001);
+        low.set_bits(40..44, 0b1001);
 
         let mut high = 0;
-        high.set_range(0..32, ptr.get_range(32..64));
+        high.set_bits(0..32, ptr.get_bits(32..64));
 
         Descriptor::SystemSegment(low, high)
     }
@@ -900,7 +900,7 @@ We also rewrite the `set_stack_index` method in `src/interrupts/idt.rs`:
 pub fn set_stack_index(&mut self, index: u16) -> &mut Self {
     // The hardware IST index starts at 1, but our software IST index
     // starts at 0. Therefore we need to add 1 here.
-    self.0.set_range(0..3, index + 1);
+    self.0.set_bits(0..3, index + 1);
     self
 }
 ```