Update x86 crate to version 0.8.0 (#266)

(cherry picked from commit 02697891e2)

Cargo.toml

@@ -17,7 +17,7 @@ path = "libs/hole_list_allocator"
 
 [dependencies.x86]
 default-features = false
-version = "0.7.0"
+version = "0.8.0"
 
 [lib]
 crate-type = ["staticlib"]

src/interrupts/idt.rs

@@ -7,7 +7,8 @@
 // option. This file may not be copied, modified, or distributed
 // except according to those terms.
 
-use x86::segmentation::{self, SegmentSelector};
+use x86::shared::segmentation::{self, SegmentSelector};
+use x86::shared::PrivilegeLevel;
 
 pub struct Idt([Entry; 16]);
 
@@ -22,11 +23,11 @@ impl Idt {
     }
 
     pub fn load(&'static self) {
-        use x86::dtables::{DescriptorTablePointer, lidt};
+        use x86::shared::dtables::{DescriptorTablePointer, lidt};
         use core::mem::size_of;
 
         let ptr = DescriptorTablePointer {
-            base: self as *const _ as u64,
+            base: self as *const _ as *const ::x86::bits64::irq::IdtEntry,
             limit: (size_of::<Self>() - 1) as u16,
         };
 
@@ -62,7 +63,7 @@ impl Entry {
 
     fn missing() -> Self {
         Entry {
-            gdt_selector: SegmentSelector::new(0),
+            gdt_selector: SegmentSelector::new(0, PrivilegeLevel::Ring0),
             pointer_low: 0,
             pointer_middle: 0,
             pointer_high: 0,

src/lib.rs

@@ -63,7 +63,7 @@ pub extern "C" fn rust_main(multiboot_information_address: usize) {
 }
 
 fn enable_nxe_bit() {
-    use x86::msr::{IA32_EFER, rdmsr, wrmsr};
+    use x86::shared::msr::{IA32_EFER, rdmsr, wrmsr};
 
     let nxe_bit = 1 << 11;
     unsafe {
@@ -73,10 +73,9 @@ fn enable_nxe_bit() {
 }
 
 fn enable_write_protect_bit() {
-    use x86::controlregs::{cr0, cr0_write};
+    use x86::shared::control_regs::{cr0, cr0_write, CR0_WRITE_PROTECT};
 
-    let wp_bit = 1 << 16;
+    unsafe { cr0_write(cr0() | CR0_WRITE_PROTECT) };
-    unsafe { cr0_write(cr0() | wp_bit) };
 }
 
 #[cfg(not(test))]

src/memory/paging/mapper.rs

@@ -111,7 +111,7 @@ impl Mapper {
                      .expect("mapping code does not support huge pages");
         let frame = p1[page.p1_index()].pointed_frame().unwrap();
         p1[page.p1_index()].set_unused();
-        unsafe { ::x86::tlb::flush(page.start_address()) };
+        unsafe { ::x86::shared::tlb::flush(page.start_address()) };
         // TODO free p(1,2,3) table if empty
         // allocator.deallocate_frame(frame);
     }

src/memory/paging/mod.rs

@@ -110,11 +110,11 @@ impl ActivePageTable {
                    f: F)
         where F: FnOnce(&mut Mapper)
     {
-        use x86::{controlregs, tlb};
+        use x86::shared::{control_regs, tlb};
         let flush_tlb = || unsafe { tlb::flush_all() };
 
         {
-            let backup = Frame::containing_address(unsafe { controlregs::cr3() } as usize);
+            let backup = Frame::containing_address(unsafe { control_regs::cr3() } as usize);
 
             // map temporary_page to current p4 table
             let p4_table = temporary_page.map_table_frame(backup.clone(), self);
@@ -135,13 +135,13 @@ impl ActivePageTable {
     }
 
     pub fn switch(&mut self, new_table: InactivePageTable) -> InactivePageTable {
-        use x86::controlregs;
+        use x86::shared::control_regs;
 
         let old_table = InactivePageTable {
-            p4_frame: Frame::containing_address(unsafe { controlregs::cr3() } as usize),
+            p4_frame: Frame::containing_address(unsafe { control_regs::cr3() } as usize),
         };
         unsafe {
-            controlregs::cr3_write(new_table.p4_frame.start_address() as u64);
+            control_regs::cr3_write(new_table.p4_frame.start_address());
         }
         old_table
     }