Update posts to use x86_64 crate

This commit is contained in:
Philipp Oppermann
2017-03-15 16:57:02 +01:00
parent 02eaeb7af1
commit 4853baaabc
6 changed files with 46 additions and 50 deletions

View File

@@ -345,12 +345,11 @@ pub fn with<F>(&mut self,
f: F)
where F: FnOnce(&mut ActivePageTable)
{
use x86::shared::tlb;
let flush_tlb = || unsafe { tlb::flush_all() };
use x86_64::instructions::tlb;
// overwrite recursive mapping
self.p4_mut()[511].set(table.p4_frame.clone(), PRESENT | WRITABLE);
flush_tlb();
tlb::flush_all();
// execute f in the new context
f(self);
@@ -449,7 +448,7 @@ Right now, the `with` function overwrites the recursive mapping and calls the cl
To backup the physical P4 frame of the active table, we can either read it from the 511th P4 entry (before we change it) or from the CR3 control register directly. We will do the latter as it should be faster and we already have a external crate that makes it easy:
```rust
use x86::shared::control_regs;
use x86_64::shared::control_regs;
let backup = Frame::containing_address(
unsafe { control_regs::cr3() } as usize
);
@@ -482,8 +481,8 @@ pub fn with<F>(&mut self,
f: F)
where F: FnOnce(&mut Mapper)
{
use x86::shared::{control_regs, tlb};
let flush_tlb = || unsafe { tlb::flush_all() };
use x86_64::instructions::tlb;
use x86_64::shared::{control_regs, tlb};
{
let backup = Frame::containing_address(
@@ -494,14 +493,14 @@ pub fn with<F>(&mut self,
// overwrite recursive mapping
self.p4_mut()[511].set(table.p4_frame.clone(), PRESENT | WRITABLE);
flush_tlb();
tlb::flush_all();
// execute f in the new context
f(self);
// restore recursive mapping to original p4 table
p4_table[511].set(backup, PRESENT | WRITABLE);
flush_tlb();
tlb::flush_all();
}
temporary_page.unmap(self);
@@ -755,7 +754,7 @@ We do this in a new `ActivePageTable::switch` method:
// in `impl ActivePageTable` in src/memory/paging/mod.rs
pub fn switch(&mut self, new_table: InactivePageTable) -> InactivePageTable {
use x86::shared::control_regs;
use x86_64::shared::control_regs;
let old_table = InactivePageTable {
p4_frame: Frame::containing_address(
@@ -976,7 +975,7 @@ So we need to enable the `NXE` bit. For that we use the awesome [x86][rust-x86]
// in lib.rs
fn enable_nxe_bit() {
use x86::shared::msr::{IA32_EFER, rdmsr, wrmsr};
use x86_64::shared::msr::{IA32_EFER, rdmsr, wrmsr};
let nxe_bit = 1 << 11;
unsafe {
@@ -996,7 +995,7 @@ Right now, we are still able to modify the `.code` and `.rodata` sections, even
// in lib.rs
fn enable_write_protect_bit() {
use x86::shared::control_regs::{cr0, cr0_write, CR0_WRITE_PROTECT};
use x86_64::shared::control_regs::{cr0, cr0_write, CR0_WRITE_PROTECT};
unsafe { cr0_write(cr0() | CR0_WRITE_PROTECT) };
}