diff --git a/blog/content/second-edition/posts/10-paging-implementation/index.md b/blog/content/second-edition/posts/10-paging-implementation/index.md index 82654029..8ed8a100 100644 --- a/blog/content/second-edition/posts/10-paging-implementation/index.md +++ b/blog/content/second-edition/posts/10-paging-implementation/index.md @@ -113,11 +113,16 @@ On x86_64, however, we can use [huge pages] with size 2MiB for the mapping, inst For devices with very small amounts of physical memory, we could **map the page tables frames only temporarily** when we need to access them. To be able to create the temporary mappings we only need a single identity-mapped level 1 table: -![A virtual and a physical address space with an identity mapped level 1 table, which maps its 0th entry to the level 2 table frame, thereby mapping that frame to page with address 0](temporarily-mapped-page-tables.png) +![A virtual and a physical address space with an identity mapped level 1 table, which maps its 0th entry to the level 2 table frame, thereby mapping that frame to page with address 0](temporarily-mapped-page-tables.svg) The level 1 table in this graphic controls the first 2 MiB of the virtual address space. This is because it is reachable by starting at the CR3 register and following the 0th entry in the level 4, level 3, and level 2 page tables. The entry with index `8` maps the virtual page at address `32 KiB` to the physical frame at address `32 KiB`, thereby identity mapping the level 1 table itself. The graphic shows this identity-mapping by the horizontal arrow at `32 KiB`. -By writing to the identity-mapped level 1 table, our kernel can create up to 511 temporary mappings (512 minus the entry required for the identity mapping). In the above example, the kernel mapped the 0th entry of the level 1 table to the frame with address `24 KiB`. This created a temporary mapping of the virtual page at `0 KiB` to the physical frame of the level 2 page table, indicated by the dashed arrow. Now the kernel can access the level 2 page table by writing to the page starting at `0 KiB`. +By writing to the identity-mapped level 1 table, our kernel can create up to 511 temporary mappings (512 minus the entry required for the identity mapping). In the above example, the kernel created two temporary mappings: + +- By mapping the 0th entry of the level 1 table to the frame with address `24 KiB`, it created a temporary mapping of the virtual page at `0 KiB` to the physical frame of the level 2 page table, indicated by the dashed arrow. +- By mapping the 9th entry of the level 1 table to the frame with address `4 KiB`, it created a temporary mapping of the virtual page at `36 KiB` to the physical frame of the level 4 page table, indicated by the dashed arrow. + +Now the kernel can access the level 2 page table by writing to page `0 KiB` and the level 4 page table by writing to page `33 KiB`. The process for accessing an arbitrary page table frame with temporary mappings would be: diff --git a/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.png b/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.png deleted file mode 100644 index 3caca134..00000000 Binary files a/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.png and /dev/null differ diff --git a/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.svg b/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.svg new file mode 100644 index 00000000..47c0d053 --- /dev/null +++ b/blog/content/second-edition/posts/10-paging-implementation/temporarily-mapped-page-tables.svg @@ -0,0 +1,2 @@ + +
Physical Memory
Physical Memory
0KiB
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Level 4 Page Table
Level 4 Page Table
4KiB
[Not supported by viewer]
IndexFrameFlags
024KiB
r/w
…


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Level 3 Page Table
Level 3 Page Table
16KiB
<div>16KiB</div>
24KiB
<div>24KiB</div>
8KiB
[Not supported by viewer]
IndexFrameFlags
0
32KiB
r/w
…


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Level 2 Page Table
Level 2 Page Table
Level 1 Page Table
Level 1 Page Table
32KiB
<div>32KiB</div>
IndexFrameFlags
024KiB
r/w
…


8
32KiBr/w
9
4KiB
r/w
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4KiB
4KiB
CR3 Register
CR3 Register
IndexFrameFlags
016KiB
r/w
…


[Not supported by viewer]
Virtual Memory
Virtual Memory
0KiB
[Not supported by viewer]
4KiB
[Not supported by viewer]
16KiB
<div>16KiB</div>
24KiB
<div>24KiB</div>
8KiB
[Not supported by viewer]
32KiB
<div>32KiB</div> \ No newline at end of file