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Code Issues Projects Releases Wiki Activity

Update some broken anchor links (#1444)

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Philipp Oppermann
2025-12-08 17:31:52 +01:00
committed by GitHub
parent 86c36479cf
commit 211f460251
56 changed files with 387 additions and 387 deletions
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2
blog/content/edition-2/posts/deprecated/05-integration-tests/index.md
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@@ -55,7 +55,7 @@ Such an automated test framework needs to know whether a test succeeded or faile
The chips implementing a serial interface are called [UARTs]. There are [lots of UART models] on x86, but fortunately the only differences between them are some advanced features we don't need. The common UARTs today are all compatible to the [16550 UART], so we will use that model for our testing framework.
[UARTs]: https://en.wikipedia.org/wiki/Universal_asynchronous_receiver-transmitter
[lots of UART models]: https://en.wikipedia.org/wiki/Universal_asynchronous_receiver-transmitter#UART_models
[lots of UART models]: https://en.wikipedia.org/wiki/Universal_asynchronous_receiver-transmitter#Models
[16550 UART]: https://en.wikipedia.org/wiki/16550_UART
### Port I/O

16
blog/content/edition-2/posts/deprecated/10-advanced-paging/index.md
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@@ -143,13 +143,13 @@ We can now calculate virtual addresses for the page tables of all four levels. W
The table below summarizes the address structure for accessing the different kinds of frames:
Virtual Address for | Address Structure ([octal])
------------------- | -------------------------------
Page | `0o_SSSSSS_AAA_BBB_CCC_DDD_EEEE`
Level 1 Table Entry | `0o_SSSSSS_RRR_AAA_BBB_CCC_DDDD`
Level 2 Table Entry | `0o_SSSSSS_RRR_RRR_AAA_BBB_CCCC`
Level 3 Table Entry | `0o_SSSSSS_RRR_RRR_RRR_AAA_BBBB`
Level 4 Table Entry | `0o_SSSSSS_RRR_RRR_RRR_RRR_AAAA`
| Virtual Address for | Address Structure ([octal]) |
| ------------------- | -------------------------------- |
| Page | `0o_SSSSSS_AAA_BBB_CCC_DDD_EEEE` |
| Level 1 Table Entry | `0o_SSSSSS_RRR_AAA_BBB_CCC_DDDD` |
| Level 2 Table Entry | `0o_SSSSSS_RRR_RRR_AAA_BBB_CCCC` |
| Level 3 Table Entry | `0o_SSSSSS_RRR_RRR_RRR_AAA_BBBB` |
| Level 4 Table Entry | `0o_SSSSSS_RRR_RRR_RRR_RRR_AAAA` |
[octal]: https://en.wikipedia.org/wiki/Octal
@@ -369,7 +369,7 @@ When we run it, we see the same result as with our handcrafted translation funct
Our `memory::init` function is an [unsafe function], which means that an `unsafe` block is required for calling it because the caller has to guarantee that certain requirements are met. In our case, the requirement is that the passed address is mapped to the physical frame of the level 4 page table.
[unsafe function]: https://doc.rust-lang.org/book/ch19-01-unsafe-rust.html#calling-an-unsafe-function-or-method
[unsafe function]: https://doc.rust-lang.org/book/ch20-01-unsafe-rust.html#calling-an-unsafe-function-or-method
The second property of unsafe functions is that their complete body is treated as an `unsafe` block, which means that it can perform all kinds of unsafe operations without additional unsafe blocks. This is the reason that we didn't need an `unsafe` block for dereferencing the raw `level_4_table_ptr`: