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Move the ToC of Paging Implementation after the aside

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Philipp Oppermann
2019-03-19 13:24:41 +01:00
parent 48d96243ea
commit 0605fc54df
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blog/content/second-edition/posts/10-paging-implementation/index.md
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@@ -15,7 +15,6 @@ This blog is openly developed on [GitHub]. If you have any problems or questions
[at the bottom]: #comments [at the bottom]: #comments
[post branch]: https://github.com/phil-opp/blog_os/tree/post-10 [post branch]: https://github.com/phil-opp/blog_os/tree/post-10
<!-- toc -->
<aside class="post_aside"> <aside class="post_aside">
@@ -32,6 +31,8 @@ I hope that you enjoy this new post!
</aside> </aside>
<!-- toc -->
## Introduction ## Introduction
The [previous post] gave an introduction to the concept of paging. It motivated paging by comparing it with segmentation, explained how paging and page tables work, and then introduced the 4-level page table design of `x86_64`. We found out that the bootloader already set up a page table hierarchy for our kernel, which means that our kernel already runs on virtual addresses. This improves safety since illegal memory accesses cause page fault exceptions instead of modifying arbitrary physical memory. The [previous post] gave an introduction to the concept of paging. It motivated paging by comparing it with segmentation, explained how paging and page tables work, and then introduced the 4-level page table design of `x86_64`. We found out that the bootloader already set up a page table hierarchy for our kernel, which means that our kernel already runs on virtual addresses. This improves safety since illegal memory accesses cause page fault exceptions instead of modifying arbitrary physical memory.